Wafer Level Packaging

 

 Foundry Services

 Equipment

Pac Tech is the worldwide leading supplier in Electroless Wafer Bumping technologies. With volume production facilities in Germany, USA, and Japan; Pac Tech offers a capacity of over 760,000 wafers per year in 6”, 8”, and 12”. Pac Tech provides turnkey Wafer Bumping and Wafer Level Packaging solutions. This includes engineering, development of prototypes, and high volume production.

Pac Tech offers following technologies for Wafer Level Packaging:

Wafer Bumping (Flip Chip & WLCSP):
E-less Ni/Au Bumping (4, 5, 6, 8, & 12 inch wafers)
E-less Ni/Au² or Ni/Pd/Au for TS Wirebonding
Aluminum and Copper Pad Metallization
Wafer Level Printing (eut.SnPb, SnAgCu)
Micro Solder Ball Attach
Solder Ball SB2-Jet (eut.SnPb, SnAgCu, AuSn, InSn)
Wafer Level RDL with BCB Repassivation

Backend Processing & Assembly:
Wafer Thinning & Dicing, Backside Laser Marking
Die Singulation & Reel Packaging, Flip Chip Assembly

Pac Tech's philosophy is to integrate its leading technology developments into volume production equipment.

 

 


 

Pac Tech provides three equipment platforms:

 

Electroless Plating and Peripheral Equipment:
PACLINE 300, PlasPac, SpinPac,
V-Pac, MegaPac

Laser Assisted Solder Jetting and Die/Wafer Level Attach for Flip Chip and MEMS Packaging:
SB² Jet, LAPLACE-FC, LAPLACE-WLP, Laser Marking LS²

Wafer Level µSolder Ball Attach, Ball Inspectionand Ball Rework:
ultra SB², Bump AOI HS³

 

PRESS RELEASES

IMAPS Scottsdale - NiPdAu

Read the complete Press Release => 

 
  

RECENT PUPLICATIONS

[54]      Thorsten Teutsch, "ENIG vs. ENEP (G) Under Bump Metallization for Lead free WL-CSP Solder Bumps - a Comparison of Intermetallic Properties Using High Speed Pull Test", IMAPS International Conference on Device Packaging, (Scottsdale, Arizona), Mar. 17-20, 2008
 
  

VISIT US AT

IMAPS HiTec 
May 13-14
Albuquerque
New Mexico
www.imaps.org